SS, FS or FM+ Spike Suppression Limit Register
IC_FS_SPKLEN | This field must be set before any I2C bus transaction can take place to ensure stable operation. This register sets the duration, measured in IC_CLK cycles, of the longest spike in the SCL or SDA lines that will be filtered out by the spike suppression logic. This register is written only when the I2C interface is disabled which corresponds to the I2C_ENABLE[ENABLE] register being set to 0x0. Writes at other times have no effect. The minimum valid value is 0x1. |